Actel has introduced its low-cost CorePWM, a Pulse Width Modulation (PWM) intellectual property (IP) building block for digital-to-analog conversion, optimized for the company’s nonvolatile field-programmable gate arrays (FPGAs). When implemented in an Actel Fusion Programmable System Chip (PSC), CorePWM enables the design of a single-chip, closed-loop control system, helping to minimize components and maximize flexibility. The digital-to-analog conversion capabilities of the CorePWM solution, combined with the analog blocks of Actel Fusion PSCs, make it appropriate for embedded mixed-signal applications in the industrial, medical, military/aerospace, communications, consumer and automotive markets. The small CorePWM IP core uses only 11 percent of the logic of a 30K-gate ProASIC3 or four percent of a 90K-gate Fusion device. It has a register-based interface that can be used with or without a microcontroller, such as Actel’s Core8051 or CoreMP7. The CorePWM has up to eight PWM output channels with 8-bit PWM resolution and an 8-bit prescaler. The core clock speed is 98 MHz on an Actel Fusion device. The core can be utilized in a number of embedded applications, including heating and cooling, motor control, motion control, voltage output adjustment and sound generation. Other Actel FPGA families supporting the new core include ProASIC3, ProASIC Plus, Axcelerator and RTAX-S. The CorePWM is available now and is priced at US$3,000 for a single-use netlist. A free evaluation version of the core is available for download via Actel’s Web site.